1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor device, particularly a semiconductor device with MOSFETs.
2. Description of the Related Art
A MOSFET is manufactured generally by forming a gate electrode on a gate oxide film over a semiconductor region of one conductivity type and forming drain and source regions of another conductivity type opposite to the one conductivity type in the semiconductor region on opposite sides of the gate electrode.
A gate voltage (threshold voltage) necessary for inverting the conductivity type of the semiconductor region (channel region) under the gate electrode depends on the impurity concentration of the channel region. In order to obtain a suitable threshold voltage without increasing the impurity concentration of the whole semiconductor region, channel doping is performed by which impurities are doped in the surface region defining the channel region.
Electrical isolation between semiconductor elements is generally achieved by forming a thick field oxide film. However, if the concentration of impurities, particularly p-type impurities, is low, the surface of the p-type semiconductor region contacting the thick field oxide film may be inverted into an n-type by positive charges in the oxide film, resulting in an undesired channel. In order to avoid the formation of such a channel, a channel stop region having an increased impurity concentration is formed under the oxide film.
In a CMOS integrated circuit, n-type regions are formed in a p-type well, and p-type regions are formed in an n-type well. A pnpn structure is formed along the interface between the p- and n-type wells, resulting in a danger of latch-up. A retrograde well structure is known as an effective well structure for preventing latch-up.
A retrograde well has an impurity concentration distribution which shows a higher impurity concentration at the region more remote from the surface of the semiconductor substrate. Such an impurity concentration distribution is effective for lowering the effects of parasitic elements.
A retrograde well is generally formed by the following processes. First, after electrically isolating semiconductor element regions by LOCOS oxidation, impurities for forming a well are implanted at a high energy by using a resist mask thicker than an ordinary mask as an ion implantation mask. Next, by using the same mask, impurities for forming a channel stop region and a threshold voltage control region are implanted.
Impurities implanted at a high energy has a distribution peak at some depth from the semiconductor substrate surface. Therefore, the impurity concentration lowers towards the surface from the peak position.
Impurities for channel stop are required to be implanted under the thick field oxide film used for element isolation. Channel stop impurities are therefore implanted at a relatively high energy, and impurities are implanted also into the element forming region at a relatively deep position. The impurity concentration at the surface region lowers, being difficult to realize a desired threshold value. In order to obtain optimum impurity concentrations both at the channel stop region and at the threshold voltage control region, it becomes necessary to implant impurity ions at a different acceleration energy.
FIGS. 5A to 5C are schematic diagrams explaining the structure of a conventional MOSFET in a CMOS integration circuit.
Referring to FIG. 5A, a thick field oxide film 63 is being formed on the surface of an n-type Si substrate 51. The field oxide film 63 surrounds an element forming region in which a deep p-type well 52 is formed. The p-type well 52 is a retrograde well.
A p-type channel stop region 53 of a high impurity concentration is being formed submerging under the field oxide film 63. Since the channel stop region 53 is formed by using the same mask as used for forming the retrograde well 52, the lateral shape of the channel stop region is the same as the retrograde well 52.
By using the same mask, a threshold voltage control region 54 is formed at a shallower position. The p-type well 52, channel stop region 53, and threshold voltage control region 54 are formed by implanting ions at different acceleration voltages.
For example, the well region 52 is formed by implanting boron at an acceleration voltage of 400 keV and at a dose of 4.times.10.sup.13 cm.sup.-2, the channel stop region 53 is formed by implanting boron at an acceleration voltage of 80 keV and at a dose of 2.times.10.sup.12 cm.sup.-2, and the threshold voltage control region 54 is formed by implanting boron at an acceleration voltage of 30 keV and at a dose of 4.times.10.sup.12 cm.sup.-2. The thickness of the field oxide film 63 is 250 nm for example.
A polycrystalline Si gate electrode 57 is formed over the channel region, with a gate oxide film 56 being interposed therebetween. A lightly doped n-type region 59 constituting an LDD (lightly doped drain) structure is formed through ion implantation.
Thereafter, a side wall oxide region 58 is formed on the side walls of the gate electrode 58 by deposition of an oxide film followed by reactive ion etching (RIE), and then n-type impurity ions are implanted to form source/drain regions 60.
FIGS. 5B and 5C show impurity concentration distributions obtained by implanting ions three times for forming the well region 52, channel stop region 53, and threshold voltage control region 54. FIG. 5B shows the impurity concentration distribution at the channel region.
At the channel region, ion implantation is performed three times. As a result, the region having a high impurity concentration is formed in some wide depth region near the surface of the retrograde well 52.
The source/drain regions 60 at the element forming region are formed in this region having a relatively high impurity concentration as shown in FIG. 5B. As a result, a parasitic capacitance at the source/drain regions becomes large.
FIG. 5C shows the impurity concentration distribution under the field oxide film 63. It is necessary to form the channel stop region 53 having a high impurity concentration just under the field oxide film 63. The channel stop region 53 is formed by implanting ions at an acceleration energy sufficient for allowing ions to pass through the field oxide film 63 and at a dose sufficient for providing a necessary impurity concentration.
Implanted impurity ions are decelerated by the field oxide film 63. Therefore, a valley of the impurity concentration distribution is formed at a position shallower than that shown in FIG. 5B.